1. Field of the Invention
The present invention relates to a semiconductor device.
2. Background of the Related Art
In some cases, an external surge voltage or a noise voltage and a surge voltage, such as electromagnetic noise which is generated by the operation of a power semiconductor element, are applied to a power semiconductor element, such as an insulated gate bipolar transistor (IGBT). A protective diode clamps an overvoltage including the external surge voltage or the noise voltage and the surge voltage, such as the electromagnetic noise, to prevent the overvoltage from being applied to the power semiconductor element. In this way, a semiconductor device having the power semiconductor element formed therein has a high breakdown resistance.
The semiconductor device having the power semiconductor element formed therein is mounted in, for example, an internal combustion engine ignition device. The circuit structure of a main portion of the internal combustion engine ignition device will be described. FIG. 9 is a circuit diagram illustrating the circuit structure of the main portion of an internal combustion engine ignition device 600. In FIG. 9, a portion surrounded by a rectangular frame Q is a semiconductor device 500 in which an IGBT 503 which is a power semiconductor element and a peripheral circuit for controlling the IGBT 503 are formed on the same semiconductor substrate 601. The semiconductor device 500 functions as, for example, an igniter that controls the flow of a low-voltage current to a primary coil 505 of an ignition coil. The IGBT 503 forms a switch that controls the flow of the low-voltage current to the primary coil 505.
In FIG. 9, when an on signal is input from a gate driving circuit 501, it is input to a gate of the IGBT 503 through a gate resistor 502. Then, the gate potential of the IGBT 503 increases and the IGBT 503 is turned on. When the IGBT 503 is turned on, a current flows from a battery 504 to the primary coil 505. Meanwhile, when an off signal is input from the gate driving circuit 501, the IGBT 503 is turned off and the potential of a collector C increases. Then, the flow of the current to the primary coil 505 is cut and the voltage of the primary coil 505 increases. Then, a high voltage corresponding to the turn ratio is generated in a secondary coil 506 and discharge occurs in the gap of a spark plug 507 to start the engine.
A protective diode 508 which is connected between the collector C and the gate G of the IGBT 503 clamps a high voltage which is applied to the collector C of the IGBT 503 when the IGBT 503 is turned off to prevent an overvoltage from being applied to the IGBT 503.
When the protective diode 508 reaches a clamping voltage, a clamping current Icl flows to the protective diode 508. The clamping current Icl flows to a ground GND through the gate resistor 502 and a zener diode 509 to increase the gate potential of the IGBT 503. When the gate potential of the IGBT 503 increases, the IGBT 503 is turned on and a clamping current Icl which flows to the primary coil 505 flows to the ground GND through the IGBT 503. As such, when the current which flows to the primary coil 505 flows to the ground GND, a large amount of energy stored in the primary and secondary coils 505 and 506 diverges.
Next, the structure of the semiconductor device 500 will be described. FIG. 10 is a diagram illustrating the structure of the semiconductor device 500 according to the related art. FIG. 10(a) is a plan view illustrating a main portion of the semiconductor device 500 according to the related art and FIG. 10(b) is a cross-sectional view illustrating the cross-sectional structure of the main portion taken along the line Y-Y of FIG. 10(a). The semiconductor device 500 includes a p-type collector region 52, an n-type buffer region 53 that is provided on the p-type collector region 52, and an n-type drift region 54 (n− region) that is provided on a surface of the n-type buffer region 53 which is opposite to the p-type collector region 52.
A p base region is selectively provided in a surface layer of the surface of the n-type drift region 54 which is opposite to the n-type buffer region 53 (a p-type well region 55 connected to a portion (hereinafter, referred to as an extension portion) of the p-type base region which extends from an active region 71 to the outside (the outer circumference of a chip) is illustrated in FIG. 10). In addition, a ring-shaped p-type guard ring region 56 is provided outside the p-type base region 55 in the surface layer of the surface of the n-type drift region 54 which is opposite to the n-type buffer region 53 so as to surround the active region 71. An IGBT and a protective diode 60 which are formed in the semiconductor device 500 correspond to the IGBT 503 and the protective diode 508 in the circuit diagram illustrated in FIG. 9, respectively.
An n-type emitter region (an n-type layer 57 which is connected to an extension portion of an n-type emitter region is illustrated in FIG. 10) is provided in the p-type base region. A MOS gate (an insulated gate including metal, an oxide film, and a semiconductor) structure including the p-type base region, the n-type emitter region, a gate insulating film, and a gate electrode (not illustrated) is provided on the side of the n-type drift region 54 which is close to the front surface of the chip. An emitter electrode 58 is electrically connected to the p-type base region (p-type well region 55) and the n-type emitter region (n-type layer 57). A collector electrode 52a is provided on the rear surface of the semiconductor device 500 so as to be electrically connected to the p-type collector region 52.
In addition, an oxide film 59 that is provided on the p-type guard ring region 56 and a protective diode 60 that is provided with the oxide film 59 interposed therebetween, are provided on the front surface of the semiconductor device 500. The protective diode 60 is provided on a field oxide film 59a which is a thick portion of the oxide film 59 formed on the p-type guard ring region 56. One end of the protective diode 60 is connected to a stopper electrode 61 in which a collector potential is reflected through an n+ layer 72. The other end of the protective diode 60 is connected to a gate wire 63 through the n+ layer 72. The gate wire 63 is a metal wire that is connected to a gate electrode (not illustrated) which is made of polysilicon (poly-Si) and a gate pad electrode 62 made of a metal film.
A boron phosphorus silicate glass (BPSG) film 64 and a resistive silicon nitride film (resistive SiN film) 65 are provided as a surface protective film on the protective diode 60. In addition, an n-type stopper region 66 is provided outside the p-type guard ring region 56 in the surface layer of the surface of the n-type drift region 54 which is opposite to the n-type buffer region 53 so as to be connected to the stopper electrode 61. A scribe region 67 is provided outside the n-type stopper region 66. For example, the p-type collector region 52, the n-type buffer region 53, the n-type drift region 54 (n− region 54a), the p-type base region (p-type well region 55), the n-type emitter region (n-type layer 57), the p-type guard ring region 56, and the n-type stopper region 66 are formed on an n-type semiconductor substrate 51 (semiconductor chip 80).
A plurality of series pn zener diodes 68 are provided in the protective diode 60 such that p+ layers 69 and n− layers 70 are alternately arranged from the active region 71 to the outer circumference of the chip. The series pn zener diode 68 is a junction of the p+ layer 69 and the n− layer 70. The series pn zener diodes 68 forming the protective diode 60 has a function of equally widening the gap between equipotential lines in the n− region 54a (the extension portion of the n-type drift region 54) between the p-type guard ring region 56 and the n-type stopper region 66. The p+ layers 69 are disposed in portions of the protective diode 60 which are closest to the active region 71 and the outer circumference of the chip and come into contact with the n+ layer 72.
The resistive SiN film 65 functions as a field plate. The field plate forming the resistive SiN film 65 is less likely to be affected by surface charge and can reduce the length of a termination structure region 500a (the width of the termination structure region 500a in a direction from the active region 71 to the chip outer circumference) which surrounds the active region 71 in the semiconductor device 500. A portion of the termination structure region 500a including a region in which the protective diode 60 is formed has a rectangular shape in a plan view which is convex toward to the inside of the chip and has a larger width than the other portion of the termination structure region 500a (a region in which the protective diode 60 is not formed). In an intermediate region F between the region in which the protective diode 60 is formed and the region in which the protective diode 60 is not formed, the breakdown voltage is likely to be reduced by the concentration of the electric field since the breakdown voltage is different and a depletion layer is spread in a different way.
However, since the resistive SiN film 65 is formed, the concentration of the electric field is reduced in the intermediate region F and a sufficient breakdown voltage is insured. As a semiconductor device in which a protective diode and a power semiconductor element are formed on the same semiconductor substrate, a structure has been disclosed in which a zener diode connected between a gate and a collector is made of polysilicon and is formed above a guard ring in a termination structure region of an IGBT, with an interlayer insulating film interposed there between (for example, see Patent Document 1: JP 2001-217420 A; Patent Document 2: JP 2002-141357 A; Patent Document 3: JP 8-88354 A; and Patent Document 4: JP 9-186315 A).
However, in the related art, for example, in the semiconductor device 500 according to the related art illustrated in FIG. 10, in some cases, a crack occurs in the resistive SiN film 65 after a temperature cycle test due to a difference in thermal expansion coefficient between the resistive SiN film 65 and an aluminum (Al) electrode (the emitter electrode 58, the gate wire 63, and the stopper electrode 61). In addition, there is a problem that the Al electrode or the resistive SiN film 65 is corroded by a temperature-humidity-bias (THB) test, characteristics are changed, and reliability is reduced. In addition, the resistive SiN film 65 has a large production tolerance and is likely to have an adverse effect on electrical characteristics.
The above-mentioned Patent Documents 1 to 3 disclose the structure in which the protective diode is provided above the p-type guard ring region, but do not disclose a means for reducing the concentration of the electric field on the outermost p-type guard ring region.
The invention has been made to solve the above-mentioned problems of the related art and an object of the invention is to provide a semiconductor device which can reduce the concentration of the electric field on a guard ring region and is covered with a surface protective film, without using a resistive SiN film.